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SE microcontroller

For more information contact Intel




+48 22 203 3120

; email:

Al. Jerozolimskie 146C, 02-305 Warsaw, Poland

The newest Intel Quark SE microcontrollers bring always-sensing intelligence and powerful peripheral support to

the next generation of intelligent connected devices.

Product Overview

Intel is proud to announce the Intel® Quark™ SE

microcontroller, bringing intelligent power to the

edge by combining a microcontroller with an on-

board sensor subsystem to manage power con-

sumption through programmable wake cues. The

Intel Quark SE microcontroller also features pat-

tern matching technology that allows it to learn and

differentiate. The result is always-sensing intelli-

gence, bringing real-time response down to the

next generation of intelligent devices.

Pattern Matching Technology

The Intel Quark SE microcontroller includes so-

phisticated pattern matching technology that allows

it to learn through pattern recognition and differen-

tiate appropriate response events. Having decision-

making ability at the edge can provide a more real-

time response, such as in an industrial setting,

monitoring energy consumption and triggering an

event if an anomalous event occurs.

It can also reduce costs by lowering the number

of gateways required to manage edge data.

Internal Sensor Hub

The Intel Quark SE microcontroller includes an

internal sensor hub, which manages multiple sen-

sors allowing it to support more peripherals. It also

allows the main CPU to sleep, until the sensor con-

troller wakes it up based on programmable cues,

resulting in very low energy consumption.

Intel-Class Security Features

The Intel Quark SE microcontroller extends rock-

solid Intel security down to the device level with

software- and hardware-based features to help pro-

tect data at every endpoint.

Intelligence at the Edge

The Intel Quark SE microcontroller brings intelli-

gence to the edge for real-world applications. It is

interoperable with other Intel®-based systems, sim-

plifying integration of edge products in end-to-end

IoT architectures. More can be handled at the de-

vice level, reducing the need for larger gateways.

Faster Time to Market

The Intel Quark SE microcontroller simplifies de-

sign and reduces bill of materials (BOM) by mini-

mizing external components required on the plat-

form. The Intel® System Studio integrated devel-

opment environment is included with all Intel® mi-

crocontrollers. This maximizes investment of time

and money by reusing software to scale up or down

to any Intel® processor without additional costs.

The Intel Quark SE microcontroller provides tre-

mendous flexibility by requiring a single DC power

source with an operating range of 1.8–3.3 volts and

supporting the serial interfaces typically seen on

sensors, wireless modules, flash devices, and EE-

PROMs. Additionally, all 32 of its bidirectional I/O

pins can be used as general purpose I/O (GPIO).

With programmable drive strength and integrated

pull-ups, they can be connected directly to LEDs,

relays, H-bridges, or switches.

Moreover, with a 19-channel ADC with selectable

6/8/10/12-bit resolution instantiated in the Sensor

Subsystem and with 6 high-speed analog compar-

ators and 13 low-power wake-up comparators it

boasts solid mixed signal capabilities.

The Intel Quark SE microcontroller comes in a

10x10 mm 144-pin BGA and is qualified over an

industrial temperature range (-40 °C to +85 °C).

INTEL® QUARK™ SE microcontroller

features at a glance

• CPU: 32-bit processor @ 32 MHz Intel® Pen-

tium® x86-compatible without x87 floating point

unit. 8 KB instruction cache, 2-way associative

• Sensor subsystem: 32-bit DSP core @ 32 MHz.

Supporting ARCv2 ISA and floating point unit, 8

KB instruction cache, 2-way associative, 8 KB


• Pattern-matching accelerator: Hardware pattern

recognition IP, 128 neurons with 128 compo-

nents per neuron

• Flash: 384 KB on-die flash (192 KB dedicated to

host processor, 192 KB dedicated to sensor sys-

tem), 8 KB OTP

• RAM: 80 KB on-die SRAM

• General-use timers: 4

• Watchdog timer: 1

• Real-time clock: Sources a 32-bit counter run-

ning from 1 Hz up to 32.768 KHz

• UARTs: 2 16550-compliant interfaces. Baud

rates from 300 to 2M

• SPI: 2 masters with up to 4 devices per master,

1 slave

• General purpose I/O: 32 independently config-

urable, 16 additional available via sensor sub-


• USB controller: 1.1 device-only controller

• I


C: 2 general-purpose I


C interfaces, config-

urable either as master or slave. 2 master-only

interfaces available in the sensor subsystem. In-

terface speeds: 100 kbps, 400 kbps, and 1


• I


S: 2 I


S interfaces (1 transmit interface, 1 re-

ceive interface)

• ADC: Single ADC controller instantiated in the

sensor subsystem, 19 single-ended inputs, 12-

bit resolution

• Analog comparators: 19 analog comparators (6

high-performance, 13 low-power)

• DMA: 8 unidirectional channels

• Security: 8k OTP, JTAG lock, On-die NVM read/

write access control

• Package type: 10x10 mm, 144-BGA pkg

• Crystal oscillators: 32 MHz, 32.768 KHz

• Silicon oscillator: 32 MHz, 32.768 KHz

• CPU clock generator: 4/8/16/32 MHz, Low-pow-

er compute mode w/RTC, clock source

• SoC states: Active, Sleep, and Off (Host proces-

sor states: C0–C2, Sensor subsystem states:

Sensing Active, Sensing Wait, and Sensing


• Platform power: DC-DC 1.8 V, 3.3 V

• Operating temperatur: -40 °C to +85 °C


1. Power is measured at 25 °C on typical devices

with a 3.3 V supply and static I/O.

2. Active power is measured while executing a

64-point FFT.

3. Power and latency figures assume silicon os-

cillator is used.

4. Standby and retention w/o RTC assume one

low-power wake-up comparator is enabled.